Rambus has unveiled Terabyte Bandwidth Initiative at its annual developer forum in Japan. Now the question is what is Terabyte Bandwidth Initiative (TBI) and why do we need it? In simple words TBI will take us to 1TB/s local bus transfers. The present DDR technology does 2 data transfers per clock but TBI will do 32 data transfers per clock. Now the second question why do we need more bandwidth, well the bandwidth provided by DDR technology is good for dual or quad core processors. But in the world of 100 core processors that will require at-least 10X the bandwidth provided by current technology we would need TBI to keep all those cores fed. Like Intel’s Terascale initiative, which is also trying to solve the same problem, TBI is still in research phase. The prototype built by Rambus has three 65nm chips, a SoC and Two simulated DRAMs. Rambus was able to get usable signal between the SoC and the DRAMs at 32X data rate. Rambus is planning for products based in TBI by 2010.